summaryrefslogtreecommitdiffstats
path: root/wgpu/src/image/raster.rs
diff options
context:
space:
mode:
authorLibravatar Héctor Ramón Jiménez <hector@hecrj.dev>2024-04-24 21:29:30 +0200
committerLibravatar Héctor Ramón Jiménez <hector@hecrj.dev>2024-04-24 21:29:30 +0200
commit493c36ac712ef04523065b94988a88cc4db16b1a (patch)
tree9a19baac6fa56025a2aa29f3e5d77c7c98cec4b7 /wgpu/src/image/raster.rs
parentfdcec0319757d2f87c82787eab34c6bef8c5a799 (diff)
downloadiced-493c36ac712ef04523065b94988a88cc4db16b1a.tar.gz
iced-493c36ac712ef04523065b94988a88cc4db16b1a.tar.bz2
iced-493c36ac712ef04523065b94988a88cc4db16b1a.zip
Make image `Cache` eviction strategy less aggressive in `iced_wgpu`
Instead of trimming unconditionally at the end of a frame, we now trim the cache only when there is a cache miss. This way, images that are not visible but still a part of the layout will stay cached. Eviction will only happen when the images are not a part of the UI for two consectuive frames.
Diffstat (limited to 'wgpu/src/image/raster.rs')
-rw-r--r--wgpu/src/image/raster.rs9
1 files changed, 9 insertions, 0 deletions
diff --git a/wgpu/src/image/raster.rs b/wgpu/src/image/raster.rs
index 441b294f..7a837f28 100644
--- a/wgpu/src/image/raster.rs
+++ b/wgpu/src/image/raster.rs
@@ -40,6 +40,7 @@ impl Memory {
pub struct Cache {
map: FxHashMap<u64, Memory>,
hits: FxHashSet<u64>,
+ should_trim: bool,
}
impl Cache {
@@ -55,6 +56,8 @@ impl Cache {
Err(_) => Memory::Invalid,
};
+ self.should_trim = true;
+
self.insert(handle, memory);
self.get(handle).unwrap()
}
@@ -86,6 +89,11 @@ impl Cache {
/// Trim cache misses from cache
pub fn trim(&mut self, atlas: &mut Atlas) {
+ // Only trim if new entries have landed in the `Cache`
+ if !self.should_trim {
+ return;
+ }
+
let hits = &self.hits;
self.map.retain(|k, memory| {
@@ -101,6 +109,7 @@ impl Cache {
});
self.hits.clear();
+ self.should_trim = false;
}
fn get(&mut self, handle: &image::Handle) -> Option<&mut Memory> {